Job description:
In this position, you will be responsible for mixed-signal chip's logic design and verification, including block level specification, micro architecture design, RTL coding and verification, synthesis and power and static timing analysis. You will lead other digital designers to successfully complete projects Ｏn schedule.
Requirements:
1.Excellent Verilog coding and RTL design skills
2.Proficient with Verilog simulator, Synopsys power and timing analysis tools
3.Hands Ｏn experience in low power design preferred
4.Knowledgeable in all aspects of digital design
5.Successfully gone through several complete product development cycles
6.Capable of defining chip architecture and design specification
7.PhD with 3 years industrial experience or MSEE with 6 years industrial experience in IC design
8.Demonstrate leadership and work well with cross-functional teams
9.Dedicated, hard working and good team player
10.Posses excellent interpersonal as well as good communication skills
