FPGA工程师

到岗时间：不限 婚况要求：不限 职责描述：1.完成RTL从ASIC到FPGA的移植；2.生成FPGA仿真和测试case；3.完成FPGA的高速资源搭建，包括RTL设计，IP使用，仿真，时序收敛和bit文件生成；4.协同SoC工程师和软件工程师完成FPGA的功能调试。任职要求：1.电子、信电、自动化及相关专业的硕士及以上学历背景；2.2年以上FPGA开发经验；3.有FPGA 内部DCM/PLL, Memory, PCIe, DDR3/DDR4 资源的使用和开发经验；4.熟悉基于Verilog及EDA工具如Xilinx/ISE/Vivado的FPGA开发及仿真流程；5.能熟练用中英文沟通；6.有较强的技术问题解决能力和文档编写能力；7.有较强的自我驱动能力，良好的沟通和团队合作能力；8.有Emulator相关经验者优先。Responsibilities:1.Port ASIC to FPGA;2.Generate/run/debug test cases Ｏn FPGA;3.Complete FPGA High-speed solution, including RTL coding, IP using, simulation, timing closure and bit file generation;4.Work with SoC team and software team Ｏn FPGA debug.Requirements:1.Master degree or above in EE, CS or Automation;2.2 years of FPGA development experience;3.Experiences Ｏn FPGA IP using/debug, such as DCM/PLL, Memory, PCIe, DDR3/DDR4 interface etc;4.Familiar with FPGA design/simulation flow using Verilog and related EDA tools such as Xilinx ISE and Vivado;5.Fluent in both English and Chinese;6.Have good technical problem solving skills and document writing skills;7.Have strong self-motivated ability, good communication and teamwork ability;8.Familiarity with Emulator a plus.